Manager – Front End Integration & Physical Design

What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Title: Manager – Front End Integration & Physical Design  – 99275

The Role:

The FEINT/Implementation team is responsible for Synthesis, place & Route, Timing closure/CDC/LINT/DFx for very high speed (>2G) design with complex I/O clocking.

In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Data Centers and Personal Computers as well as Graphics Cards and Gaming Consoles. This is an exciting time to join the AMD team!

The Person:

As a Front End Integration & Physical Design Manager  –

• Lead a mid-size team of front-end integration and physical design engineers.
• Work with a complementary team – architects, RTL design engineers, SoC design teams & managers from High-speed I/O team. 
• Drive physical implementation of IP through the entire physical design flow, starting from Synthesis, constraint development, to achieve best PPA, while shortening the overall development schedule.
• Provides an excellent growth opportunity for robust individuals looking to make a difference.

Key Responsibilities:

• Drive all implementation aspects of next generation IPs. This team deals with multiple I/O protocols including PCIe, UCIe, CXL, Ethernet & Infinity Fabric link-layer.
• Manage highly experienced FEINT engineers working on High speed (>2G) designs with very complex clocking infrastructures.
• Implementation activities including Synthesis & DFT, floorplan, placement, clock tree synthesis, routing, STA closure, area and power optimization.
• Work on cutting edge IP for these I/O protocols to achieve physical implementation with best PPA, including developing reference floorplans, implementation scripts for SoCs worldwide, and support SoCs worldwide.

Technical Expertise:

CDC, PTPX, STA, LINT & DFT, IP, Physical design flow & scripting in TCL, Python

Preferred Experience:

• Leadership role in Synthesis, Floor-planning, Placement, clock trees synthesis
• Leading personnel, setting team goals, tasks, schedules, & best practices to improve efficiency, quality.

Academic Credentials:

• Minimum, B.S or MS in Electrical or Computer Engineering (or equivalent)
• 8-12  Years of relevant experience.

Location:

Vancouver, BC / Markham, Canada

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Requisition Number: 99275 
Country: Canada Province: Ontario City: Markham 
Job Function:Design 

AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact AskHR@amd.com.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.